Technology for higher integration of nonvolatile memory LSI typified by NAND flash memory is progressing toward the three-dimensional memory cell arrangement beyond the size reduction of memory cells with the two-dimensional arrangement. For example, a device structure has been under developing, which includes a substrate layer having a control circuit, a switching (transistor) unit selecting designated memory cells in the programming/reading operations, and a three-dimensional memory cell unit that are stacked in this order. In such a structure, it is necessary to deposit the transistor channel on an insulating film or on a metal interconnect in order to form a selection transistor on the substrate layer. Therefore, polycrystalline silicon is used instead of monocrystalline silicon as the channel of the selection transistor.
However, the carrier mobility of polycrystalline silicon is less than the carrier mobility of monocrystalline silicon. Therefore, a sufficient current (driving ability) is not obtained when downscaling the polycrystalline silicon transistor; and it is likely that the reading/programming speed of the memory degrades. Therefore, a polycrystalline silicon transistor is necessary to maintain a high driving ability (mobility) even when the channel size is reduced.